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Book page imageNEC Microcomputers, Inc. SEC TK-80A DESCRIPTION The TK-80A is a single-board computer based on NEC Microcomputers' industry standard juPD8080AF. It facilitates understanding and developing 8080A systems and assembly language programs, and consists of the following blocks: MPD8080A Microprocessor Chip Set Monitor and User ROM RAM DMA Display Programmable I/O 25 Key Keyboard Tape Cassette Interface 405
Book page imageTK-80A The juPD8080AF Processor, juPB8224 Clock Generator and Driver and the juPB8228 System Controller and Bus Driver comprise the 8080A chip set. The 8080A executes programs stored in memory and supports a large instruction set detailed in the jUCOM-8 Software Manual. The 8224, coupled with an 18.000 MHz crystal, provides the 2.0 MHz, non-overlapping two-phase MOS clocks required by the 8080A. The 8224 also provides latches for synchronizing the RESET IN and READY IN signals. The 8228 provides bi-directional data bus drivers which buffer the 8080A data bus for on-board and external use. The 8228 also provides a Status Latch and gating array which provide active low memory and I/O read/write strobes, an Interrupt Acknowledge Strobe, and a data control bus enable input. The 8080A address bus is buffered by 3-state low power Schottky drivers with their enable pins tied to the bus enable input of the 8228, thus allowing the address, data and control busses to be asynchronously disabled by a single control line for user DMA. The TK-80A resident monitor is provided in NEC Microcomputers' 1K x 8 electrically erasable read-only memory, the /iPD458. Since the 2708 and 458 are pin compatible when installed, (pin 1 to pin 1), either 2708's or 458's may be used to expand the ROM/PROM space. Through proper manipulation of on-board jumpers, any of the following devices may be used: MPD8080A MICROPROCESSOR CHIPSET MONITOR AND USER ROM/PROM P/N ORGANIZATION TYPE SUPPLIES® 458 1Kx8 EEPROM +12, +5 2708 1Kx8 EPROM +12, +5,-5 2308 1Kx8 Mask ROM +12, +5,-5 2758 1Kx8 EPROM +5 2716 2K x 8 EPROM +5 2316E 2Kx8 Mask ROM +5 2732® 4K x 8 EPROM +5 2332® 4K x 8 Mask ROM +5 Notes: © Read Mode. ® 0000 through 0FFF only. (All addresses in hexadecimal notation.) The standard configuration TK-80A has 1K bytes of socketed RAM (2 pieces juPD2114LC) located at 8000 through 83FF. Up to 3K additional RAM may be installed in the sockets dedicated to locations 8400 through 8FFF. All memory and port address decoding is completely implemented to ensure that all possible expansion options are available to the user. The Protect/Enable switch provides for the connection of battery backup to all on-board RAM. If data must be retained for long periods of time with power off, the use of the NEC's 21 14-compatible juPD444 CMOS RAM is recbm mended. In order to improve throughput and demonstrate Direct Memory Access through "Hidden Refresh", the TK-80A uses an 8-byte block of RAM to control the 8-digit LED display directly. Data bytes, whose bits correspond one-for-one to display seg- ments, are stored in display RAM, where they are directly accessed for display. The jLiPD8255 Programmable Peripheral Interface provides the TK-80A with 24 I/O lines. Because the 8255 is a very flexible I/O device, the TK-80A can support consider- able user I/O in addition to the Keyboard, Cassette and Display. The 8255 is located at Port Addresses 0F8 through 0FB, thus leaving both conventional and bit select decoding methods open for user expansion. RAM DMA DISPLAY PROGRAMMABLE I/O 406
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